Skip to content
Free public beta until December 4, 2026: every course is open, no card needed. After that, the first chapter of each course stays free and full access is a one-time $39 ($19 for up to 100 founding members chosen for helpful feedback). Your progress is kept. How the beta works

atomic instruction

An instruction whose memory update happens as one indivisible step: no other core can see or change the value halfway through.

An atomic instruction performs its access (or read-modify-write) on a memory location indivisibly with respect to all other cores and devices: x86-64 lock-prefixed instructions and xchg, ARM64 LSE instructions and successful exclusive pairs, RISC-V AMOs and lr/sc.

See also

Large System Extensions std::atomic atomic memory operation mutex
Read the full section →