Skip to content
Free public beta until December 4, 2026: every course is open, no card needed. After that, the first chapter of each course stays free and full access is a one-time $39 ($19 for up to 100 founding members chosen for helpful feedback). Your progress is kept. How the beta works

floating-point register

A register that holds float and double values, separate from the integer registers - xmm on x86-64, s/d/v on ARM64, f on RISC-V.

Each ISA has a separate floating-point register file - x86-64 xmm0-xmm15 (128-bit, low 32 or 64 bits used by scalar code), ARM64 v0-v31 viewed as s (32-bit) or d (64-bit), RISC-V f0-f31 - used by FP instructions and the calling conventions.

Read the full section →